First successful Nvidia MCP6x/MCP7x SPI access

Since a few hours, my Nvidia MCP61/MCP65/MCP67/MCP73/MCP78S/MCP79 SPI driver is tested and it works well. Only probing for a flash chip was tested, but still… this means my SPI bitbanging code is correct, and Michael Karcher’s reverse engineered docs are correct, and my implementation of the Nvidia GPIO interface used for bitbanging SPI is correct as well.

This is big news because with this patch flashrom finally has 100% support for all x86 chipsets we saw in the last ten years.

Huge thanks go to Michael Karcher for reverse engineering the interface and writing up cleanroom documentation which I could use for implementing the interface.
Huge thanks to Johannes Sjolund for testing my patch on his hardware although it was completely untested before.

Get the patch here: http://patchwork.coreboot.org/patch/1520/ (click on the “patch” link on that page to get a download).

This means all recent Nvidia chipsets should work with SPI (all chipsets newer than the nForce 5 family can use SPI flash), including the ION chipset.
As an added benefit, the RayeR SPIPGM driver (available as patch) can now be used with confidence because it uses the same SPI bitbanging core.

If you decide to test, please do NOT write/erase yet. Write/erase should work, but I’d like to see some read tests before moving on to write testing to make 100% sure that write is safe.

Published by

Carl-Daniel Hailfinger

coreboot and flashrom developer