Bifferboard porting
0
Ever heard about the bifferboard? It is a small RDC x86 SoC with 150MHz 486 compatible CPU, 8MB flash and 32MB RAM, ethernet and TTL serial line and a few GPIOs. It comes with very tiny loader called biffboot. Quite natural target for coreboot and u-boot. My flatmate purchased one but never had actually time to do anything with that so here it comes. (more…)
GSoC 2011: flashrom part 5 – Dear Intel
1As mentioned in my GSoC recap, Carl-Daniel and i have sent a letter to Intel to get more information regarding the descriptor section and unlocking the ME flash protection (my official GSoC main project). It was sent about 3 weeks ago (2011-07-29). No reply was received so far. This is the whole message we have sent them: (more…)
GSoC 2011: flashrom part 4 – recap
2Final evaluation deadline for this year’s GSoC is in 2 weeks. Most of what i have written in my midterm evaluation is still valid.
We have formulated and sent an email to various Intel representatives in the hope to get at least a few hints regarding ME unlocking (and descriptor semantics). I had the idea to send them a mail earlier, but thought it is an ludicrous attempt from all i have gathered regarding Intel’s cooperation with coreboot. Carl-Daniel suggested giving it a go anyway and it provided me a good excuse to not work on REing until we get an answer. Of course we have not received any reply to date
So i think it is quite clear that my main GSoC project will fail to be delivered on time. But i won’t vanish after GSoC and i still plan to implement ME unlocking eventually.
What’s up besides the GSoC project?
The integration of my patches still lacks reviewing power. Everyone but Carl-Daniel seems to be not much interested in my work and he has not the time to look at everything i produce. Right now flashrom has about 150 patches requiring some action to merge them. Thereof are 41 from me (TBH there is a number of patches that are just rebased and improved a little bit) and 37 from Carl-Daniel. meh.
With the help of Florian ‘florz’ Zumbiehl i was also able to find, fix and report a bug in dmidecode which has direct influence on flashrom. Due to an error in decoding the chassis type in dmidecode, flashrom falsely declares some boards to be mobile devices, which makes it shout a big warning at the user unnecessarily.
I’ve been also working on rebasing, improving and reviewing (very) old patches of others whose discussions just stopped (for example when contributors did not send improvements). My hope is that this will help us shorting the long patch queue, but i doubt that it will suffice
To conclude (or begin) my recap of my GSoC involvement this year, i’d like to first thank google for doing this. This sounds quite pathetic, especially if one knows me better. But it really got me involved in FOSS development with the intensity i wished for (by providing a monetary motivation to get really started). There was some involvement in the past (bug reports and fixes etc.), but flashrom was apparently a nice target to get more involved and learn a lot, not so much about REing and technical details (as i expected and hoped in the beginning), but regarding project management in FOSS (my own proposal, but also flashrom and its patch queue/processing and “upper management’s” free time constraints), interacting with contributers and users, and mastering git (the latter is quite ironical because flashrom does not use it (yet)). It’s a bit sad, that flashrom does not have more contributers (especially reviewers). This is obviously a problem and it might be the time to discuss the development process as a whole. The question is with whom should i discuss this if no one is there
Although my formal project will not be finished on time, i think i have served the flashrom project well and from the feedback i received so far, Carl-Daniel is also happy with my work. So i think i can declare it as successful after all and i would like to thank everyone involved (so far).
GSoC 2011: little trip
0This might be not a good idea, but I had got bored with my project not going well, so I eventually got on trip, through “FOSS and friends”
I have had some headache with nouveau driver, till I understood that deprecated version was installed. Tried to install a package, which got me in a geometric progression of required dependency packages
I have filed a bug for LibreOffice, and got one future TODO for “reverse enginering” how exactly CUPS works with one of the label printers we have here as it needs a slight modification. The best thing I have done is started reading a book and building “Linux From Scratch (LFS)”. It’s great while building a package you are accompanied with a short page of info about it, not all manual
Also I have found out that I don’t have good stuff to read, except that 1k pages book about Linux internals
While looking at the freenode chatrooms list I have found this resource about c language: http://www.iso-9899.info – all it needs is time for reading everything
My project progress is really slow. As Marc suggested I have done some work to reduce stack usage: wrapped functions to read and use file by 256B peaces (somewhat default granularity). But that still needs testing and cleaning up. Also I need to cleanup my previous work that I haven’t submitted to the list, which enabled running code in car (even though not completely working, as mtrr settings might be wrong or more problems still there).
flashrom 0.9.4 released
0After 9 months of development since the last stable version we are happy to announce the release of flashrom 0.9.4.
AMD adds Family10 G34 coreboot support
0AMD has added the Family10 G34 support to coreboot. This new support located in the AGESA vendorcode area. This AGESA code should be used for new Family 10 development. The initial development platform is the Super Micro H8QGI+-F mainboard.
Thanks to Kerry and Frank @ AMD for the submission.
A small side note, this addition put coreboot tree at over a million lines of code.
GSoC2011: coreboot spice payload, OE and rootfs
2As stated in my midterm report I’m working this first 2 weeks after midterm to work on building the payload image. I wanted to hardcode everything but we(my mentor and I) understood it would be better to use something like OpenEmbedded for that.
This first week I studied OpenEmbedded. I tested many distributions starting with angstrom, they showed too heavy for our purpose. After those tests I found micro and realized it would be a better start.
With that I’m working around micro to build our own distro, I’m adding X11 dependencies and right now I’m packing the spice client and its dependencies. In the end of the week I must have sorted every details.
GSoC2011(Week 9): boot ARM using coreboot to romstage
0Hi all. Here I come again. With one week’s work, coreboot now can add romstage to the romfile, pass control to the romstage and find ramstage. I add a new way using a binary file to add stage to a rom file. Since I have not got an idea of how to store the hardware information, no hardware initialization is done now except the console. Following I will show you some snapshots:
This is a romfile without ramstage so it hangs at finding it:

This is a romfile with a simple ramstage. The ramstage code only sends a string “Hello ARM!” to the console then hangs there. It is compressed using LZMA in the romfile and should be decompressed and copied to the RAM at address 0×5000. This romfile is for testing the decompress function and move-jump function.

Next week, I will work on the ramstage. It is one of the hardest parts since we will deal with the hardware information. I need to design it and implement it. I want my code to be tested and reviewed early for that it is not only about implementation but also design. One could change an implementation with a low cost but couldn’t change a design with a low cost.
Thanks to God and Thanks to all the coreboot developers. Working with you all is so happy and fantastic!