I merged my Nvidia MCP61/MCP65/MCP67/MCP73/MCP78S/MCP79 SPI support patch a few days ago in version 0.9.2-r1113, but right now flashrom will refuse to erase/write on those chipsets for safety reasons. Details about the patch can be found in my earlier blog post: First successful Nvidia MCP6x/MCP7x SPI access.
Current flashrom is thus well-equipped to handle any x86 mainboard you throw in its way.
The code is tested, and some people even used it to write, but this is a bitbanging driver and you never know if the timing is exactly what the flash chips expect. A rigorous cross-check between the code and various flash chip datasheets confirmed that the design of the code is right, and we will likely remove the artificial write restriction soon.
That said, the paranoid timing really impacts flashing speed. I created a speedup patch which reduces added per-halfperiod delays to zero and caches the value of the GPIOs. The result was more than a 2x speedup, and you can download the patch if you want to test it. We plan to merge the speedup patch in the next few days.
This achievement would have been impossible without the dedicated reverse engineering by Michael Karcher and many testing volunteers.