GSoC USB: weekly report #2

Last week’s GSoC work was centered around getting the USB root hub to work. USB root hub is a pseudo USB device, which is exposed as a standard USB device to the stack, but handled by controller registers. When you plug a device into a port on your computer, chances are that a root hub is involved.

As I’ve been away from my dev board for a part of the week, I used an OHCI-enabled build of QEmu for development. QEmu warned me that memory accesses are unaligned, so I’ll have to revisit my approach to register access: So far, I used bitfields like in UHCI. This works as long as care is taken that the alignment of the data is right, and as long as the size of memory accesses doesn’t matter, as the compiler may minimize memory accesses (with no way to force it not to)

OHCI requires 32bit reads and writes, so I’ll have to move away from that approach. Not nice.

On QEmu the driver happily detects device attach/detach events, but on real hardware it doesn’t yet. Only shows that QEmu is good to bootstrap a driver, but not for development of drivers that are supposed to run on real hardware, too.

So my next steps are to get that solved and to implement control and bulk transfers. After that, the driver can be properly debugged – up to now, there might be grave problems that just don’t show up yet.

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