Hi! My name’s Robert Austin, and my GSoC 2010 project is to get TianoCore working well as a coreboot payload. TianoCore is the open source component of Intel’s implementation of UEFI. TianoCore on it’s own is not a BIOS replacement, but it can do some interesting things, and since a quite a few large companies are already committed to EFI, it makes sense to have an EFI payload as an option in coreboot.
I am very excited about working on this project, and working with the coreboot community. I will make regular announcements about my progress here on this blog, and I will keep my working code available in a git repository here. There isn’t anything there yet, but there will be soon. To anyone who happens to checkout my code during the summer, I welcome any comments or suggestions relating to the style or quality of my code. I want to write high-quality code, so feedback is appreciated.
It is my second year to join GSOC. In this year, i will take in charge of AMD RS780+SB700 mass porting. I would like to write down each progress here between this summer.
Today, the dediprog ISP-Testclip-SO8 has arrived. although it’s pretty expensive, but it seems pretty cute. I have already tested in in BTDC lab, hope it can helps me much more.
After starting the USB stack in libpayload in the Google Summer of Code of 2007, I’m back this year to implement some more drivers. So far, we support UHCI Controllers – that is, USB1.x on Via and Intel chipsets.
There are also patches to support OHCI which are under GPL licensing As libpayload ist BSD-licensed, this make it unsuitable for inclusion. So this year I’ll do a clean implementation of OHCI to get this matter settled.
With this, all USB1.x controllers except for some very rare pre-standard controllers will be supported. This also includes USB2 boards, which means all current mainboards out there, as USB2 simply requires “companion controllers” (which are usually OHCI or UHCI) for USB1 modes.
After this is done, I’ll start on USB3 support. USB3 is still relatively new, but there are two reasons to start working on it:
- USB3 will be more popular in the next years, so doing it now ensures that we have one issue less to care about.
- Unlike with USB2, xHCI (the host controller standard for USB3) doesn’t use the companion concept, but requires the controller to support USB1 to USB3 itself. This means that old drivers (for UHCI, OHCI or EHCI) won’t find any controller to work with on such boards.
Implementing OHCI and xHCI ensures that all current boards as well as those of the near future will be supportable by libpayload and its users.
I am happy to tell you that flashrom (which was is a grown up former daughter project of coreboot) got one of the coreboot slots in Google Summer of Code 2010. A big thank you to Stefan Reinauer for managing the combined flashrom+coreboot GSoC projects this year.