GSoC2011: midterm report

Hi all. Welcome to my midterm report for project “porting coreboot to ARM”.

Summary

The goal of this project is porting coreboot to ARM and taking advantage of coreboot’s strength in properly configuring PCI, SAS, SATA and SCSI devices; fast boot times; and payload support.

For ARM SOCs, the device configuring is much easier than that for X86. Most device controllers are connected through the on-chip bus. So the mainly work is focus on porting the basic layout and helping tools to ARM architecture, including CBFS, cbfstool and the codes helping loading next stage and payload into ram.

Changes to this project

At first, I want to work on Marvell ARM SOCs with PCIE support, but after checking into it, I found that mostly all the information and SDK of Marvell SOCs are covered under an NDA license. So I moved to VersatilePB from Armltd.

What works now

  • CBFS record the architecture information in the master header
  • cbfstool can detect the architecture of a rom file
  • cbfstool can create an ARM rom file with bootblock
  • bootblock for VersatilePB is ready for use
  • romstage code for VersatilePB has been written

What doesn’t work (yet)

  • cbfstool can not add-stage to the romfile due to a problem in prase_elf_to_stage
  • romstage for VersatilePB has not been tested
  • ramstage code for VersatilePB has not been written

What needs work

  • design the information struct of hardware for payload on ARM

In this week, I will try to fix the problem of add-stage on ARM and test the romstage code.
Got any feature suggestions/ideas ?

spice payload: Before MidTerm GSoC report

My very first task on gsoc was to make buildrom work with latest codes from coreboot, with that I changed how it used to build coreboot. First I introduced the coreboot kconfig options to buildrom so the user can configure and choose the options for coreboot in the same mainmenu as buildrom.

 
Some small changes was introduced as a consistent pattern to name the kernel mk files and the possibility to checkout source code with https:// or svn://.
Updated some packages mk files to comply some patterns I introduced.

 
I still have some changes to introduce but I think it`s already usable. I might push the final bits in the next few days whenever I get a chance to work out my patches.

GSoC 2011: flashrom + filo = ?

 

The answer is flashrom payload, which is capable flashing roms out of usb stick. If you use seabios, you will be able to choose to run this payload instead of booting os. It might be worth for payload developers if we would have a small payload for selecting other payloads out of CBFS 🙂

Patches are here. Sorry for weird stuff there 🙂

 

My GSOC project is not going well, I end up with problems almost everywhere 🙁 (Only the good thing is that my exams went well). I spend my time trying to understand what is going on. Yesterday I was running an overflowing code allmost all day, until I found out what is wrong… My E350M1 is still not working (coreboot doesn’t run with 512 kB chip). So I have ordered some chips from ebay. While I’m waiting I have made some PCB adapters to make a dual flash device. Also made additional PCB for RS232<->UART<->USB interface.

I would better go coding… Bye!

AMD contributes A-series Family 12 (Llano), Hudson-2 (SB900), and Torpedo mainboard

Frank Vibrans from AMD pushed commits for the Fam12 and SB900 code into gerrit last week. This is just days after the official A-series release. The review has started. Feel free to help out. The gerrit links are:

http://review.coreboot.org/#change,54

http://review.coreboot.org/#change,53

http://review.coreboot.org/#change,52

http://review.coreboot.org/#change,51

http://review.coreboot.org/#change,41

http://review.coreboot.org/#change,40

 

GSoC2011(Week 5): the layout of coreboot rom and cbfstool for ARM

Hi all. How time flies. It has been 4 weeks since my last post. During this month, I have finished the design and implement of bootblock, Rom structure and cbfstool for ARM. Following I will show my changes to you all.
Continue reading GSoC2011(Week 5): the layout of coreboot rom and cbfstool for ARM

GSoC 2011: (week 2) Coreboot Spice Payload

I still haven’t had a good progress on my project, my first step is to work around the buildrom system.

I got to bring fully the coreboot Kconfig options to buildrom, since I don’t want to manually update it after coreboot updates I decided to write a small program to parse the coreboot Kconfig files. I found some api’s to help but I god stuck with that first task since none of them actually help me so much. A simple task became so complex and took me more time than I wanted(I started to update the api’s and change it acordingly to my needs, but well my project is not a kconfig api).

For a better and simpler solution I sat down and wrote a small shell script to run all the Kconfig’s and merge it into a single Kconfig.coreboot.

Now the next task is to change the building flow, how coreboot is fetched, patched and built.

For the final image and package I still want to get it all on the flash, I’m working on finding a solution to fit it as small as possible.

I found it would be interesting to use Kdrive to make the image smaller since it’s a minimal X server, but it’s unmaintained and we can build a thin X server from upstream.
For code sharing and analisys I setup a git repository so my mentor can comment on what I’m writing.
Now I have to move I bit faster.

GSoC2011(Week 1): Analysis of U-boot ARM boot code

This is such a busy week. At the end of last week, I have just ordered my OpenRD-Ultimate box but sadly it will be delivered at the end of June. So if I just wait for that box, I will not be able to test my code. That’s terrible! After talking with my mentor, I decided first porting coreboot to RealView Versatile/PB926EJ-S board then to OpenRD-Ultimate. Since qemu can emulate PB926EJ-S, I can test my code on it quickly and freely. After this work, the basic layout, libs and headers for ARM are ready to use. So I can start to port coreboot to OpenRD-Ultimate then.
Continue reading GSoC2011(Week 1): Analysis of U-boot ARM boot code

GSoC 2011: Coreboot Spice Payload

This year I was accepted on gsoc – and I`m excited – to work in a project to make corebook a spice client. The idea is to use buildrom to pack everything.

Once buildrom has been unmaintained for quite some time now I`ll need to work around it before working on the spice bits.

 

Spice

Yeah! when I say spice I mean the remote and virtualized desktop protocol, originally developed by Qumranet now acquired by Red Hat.
The basic idea is to make a client run from a minimal environment. We`ll be working on a LAB(Linux as bootloader) solution.

 

Initial steps

As I said above, we need some work around buildrom system, the coreboot buildsystem has migrated to kbuild on the stable code and lots of things have changed with it.
Both buildrom and coreboot work with kbuild with that I`m writing a small python piece of code to parse coreboot`s Kconfig files and then arrange it into buildrom source code. I also need to 1) monitor the coreboot Kconfig files changes so I run the parser again and 2) change the coreboot build calls.
With all the kconfig arranged the buildrom user needs just to set the rom properties including the coreboot options(since those options are passed to coreboot build).

The kernel configs also need some attention it`s statically set for each board, I haven`t come with a better solution for this till now.

 

Hardware and new toys

I have ordered an ALIX.3D3, a flexyICE and a new desktop computer. The first 2 are comming from EU and will be dispatched later on May. The new desktop computer I get till the end of the week(before the gsoc bonding period end).

 

Now, let`s rock.