GSoC 2013 accepted coreboot projects announced

We are happy to announce the GSoC 2013 coreboot projects:

Congratulations and welcome to coreboot GSoC 2103.

 

Support for Supermicro X7DB8+ added

It’s been a while since i committed the northbridge code for the Intel 5000 chipset. Now i finally had some spare time to clean up my Supermicro board patch. This board features:

  • Dual Socket 771
  • 1 PCI-e x4 Slot
  • 2 PCI-e x8 Slot
  • 3 PCI-X Slots
  • Onboard Adaptec SCSI Controller
  • two Gigabit NICs
  • and of course various other I/O stuff like serial ATA, IDE, serial/parallel ports, etc

What isn’t working right now:

  • Fan Control. All Fans are running on full speed, support for the Winbond W83793 and PECI has to be added
  • using a PCI-e x1 graphics card. As soon as such a card is plugged in, the system dies with a Machine check exception during startup.
  • Automatic MPTABLE generation. I’m currently working on a generic solution, but for now you have to edit devicetree.cb manually.

 

sigrok – cross-platform, open-source logic analyzer software with protocol decoder support

sigrok logo

I'm happy to finally announce an open-source (GNU GPL), cross-platform (Linux, Mac OS X, FreeBSD, Windows, ...) logic analyzer software package myself and Bert Vermeulen have been working on for quite a long time now: sigrok (it groks your signals).

History

I originally started working on an open-source logic analyzer software named "flosslogic" in 2010, because I grew tired of almost all devices having a proprietary and Windows-only software, often with limited features, limited input/output file formats, limited usability, limited protocol decoder support, and so on. Thus, the goal was to write a portable, GPL'd, software that can talk to many different logic analyzers via modules/plugins, supports many input/output formats, and many different protocol decoders.

The advantage being, that every time we add a new driver for another logic analyzer it automatically supports all the input/output formats we already have, you can use all the protocol decoders we already wrote, etc. It also works the other way around: If someone writes a new protocol decoder or file format driver, it can automatically be used with any of the supported logic analyzers out of the box.

Turns out Bert Vermeulen had been working on a similar software for a while too (due to exactly the same reasons, crappy Windows software, etc.) so it was only logical that we joined forces and worked on this together. We kept Bert's name for the software package ("sigrok"), set up a SourceForge project, mailing lists, IRC channel, wiki, etc. and started working.

Overview, Features

You can get the lastest sigrok source code from our main git repository:

  $ git clone git://sigrok.git.sourceforge.net/gitroot/sigrok/sigrok

Here's a short overview of sigrok and its features as of today. The software consists of the following components:

  • libsigrok, a shared library written in C, which contains the general infrastructure for handling logic analyzer data in a streaming fashion.
    sigrok logic analyzer collection 2011
    It also contains the individual hardware drivers which add support for various logic analyzers. Currently supported hardware includes: Saleae Logic, CWAV USBee SX, Openbench Logic Sniffer (OLS), ZEROPLUS Logic Cube LAP-C, ASIX Sigma/Sigma2, ChronoVu LA8, and others. Many more devices are on our TODO list (and we already own them), it's just a matter of time to reverse engineer the USB protocols and implement a driver for them.

    Thanks ASIX for being open and helping with the ASIX Sigma driver, and many thanks to ChronoVu for being open as well and providing information about the ChronoVu LA8 protocol! Thanks to Håvard Espeland, Martin Stensgård, and Carl Henrik Lunde (who contributed the ASIX Sigma driver), Sven Peter and "Haxx Enterprises"/bushing (for contributing the ZEROPLUS Logic Cube LAP-C driver, ported from their zerominus tool). Also, thanks to Daniel Ribeiro and Renato Caldas who worked on the Link Instruments MSO-19 driver (still work in progress).

    Finally, libsigrok also contains the individual input/output file format drivers. Currently supported are: sigrok session (the default format, which contains all metadata), bits, hex, ASCII, binary, gnuplot, the OpenBench Logic Sniffer format, the ChronoVu LA8 format, Value Change Dump (VCD) viewable in gtkwave, and Comma-separated values (CSV).
    sigrok VCD file in gtkwave

  • libsigrokdecode, a shared library written in C, which contains the protocol decoder infrastructure and the protocol decoders themselves, which are written in Python (>= 3.0).

    The list of currently supported protocol decoders includes:

      dcf77                DCF77 time protocol
  lpc                  Low-Pin-Count
  mx25lxx05d           Macronix MX25Lxx05D
  jtag_stm32           Joint Test Action Group / ST STM32
  i2s                  Integrated Interchip Sound
  spi                  Serial Peripheral Interface
  edid                 Extended display identification data
  pan1321              Panasonic PAN1321
  mlx90614             Melexis MLX90614
  jtag                 Joint Test Action Group
  rtc8564              Epson RTC-8564 JE/NB
  transitioncounter    Pin transition counter
  usb                  Universal Serial Bus
  i2cdemux             I2C demultiplexer
  i2c                  Inter-Integrated Circuit
  i2cfilter            I2C filter
  mxc6225xu            MEMSIC MXC6225XU
  uart                 Universal Asynchronous Receiver/Transmitter

    Many more decoders are on our TODO list, and we especially welcome contributed protocol decoders, of course! We intentionally chose Python as implementation language for the decoders, to make them as easy to write (and understand) as possible, even if that means that performance suffers a bit. Have a look at the SPI decoder for example, to get a feeling for the implementation.

    Protocol decoders can be stacked on top of each other, e.g. you can run the i2c decoder and pipe its output into the rtc8564 (Epson RTC-8564 JE/NB) decoder for further processing of the RTC-specific, higher-level protocol. We also plan to support more complex stacking and combining of decoders in various ways in the nearer future.

  • sigrok-cli, is a command-line frontend, which uses both libsigrok and libsigrokdecode. It can acquire samples from logic analyzers and output them in various formats into files or to stdout, and/or run protocol decoders on the aquired data.

    Example: Data acquisition with 1MHz samplerate into a file.

     $ sigrok-cli -d chronovu-la8:samplerate=1mhz --time 1ms -o test.sr

    Example: Protocol decoding (JTAG).

     $ sigrok-cli -i test.sr -a jtag:tdi=5:tms=2:tck=3:tdo=7
 [...]
 jtag: "New state: EXIT1-IR"
 jtag: "IR TDI: 11111110, 8 bits"
 jtag: "IR TDO: 11110001, 8 bits"
 jtag: "New state: UPDATE-IR"
 jtag: "New state: RUN-TEST/IDLE"
 [...]

  • sigrok-qt, a Qt-based GUI for sigrok, using both libsigrok and libsigrokdecode.

    This is intended to be a cross-platform GUI (runs fine and looks "native" on Linux, Windows, Mac OS X) supporting data acquisition and protocol decoding.

    NOTE: The Qt GUI is not yet usable! We're working on getting it out of alpha-stage for the next release.

  • sigrok-gtk, a GTK+-based GUI for sigrok, using both libsigrok and libsigrokdecode (soon).
    sigrok-gtk
    This is a cross-platform GUI contributed by Gareth McMullin (thanks!), supporting data aqcuisition (and soon protocol decoding).

    NOTE: The GTK+ GUI is not yet fully usable (but it's more usable than sigrok-qt)! Consider it alpha-stage software for now.

We're happy to hear about other (maybe special-purpose) frontends you may want to write using libsigrok/libsigrokdecode as helper libs!

Firmware

Saleae Logic

Some logic analyzer devices require firmware to be uploaded before they can be used. As always, firmware is a bit of a pain, but here's what we currently do: For non-free firmware we provide instructions how to extract it from the vendor software or from USB dumps, if possible. For distributable firmware we have a git repo where you can get it (thanks ASIX for allowing us to distribute the ASIX Sigma/Sigma2 firmware files!).

  $ git clone git://sigrok.git.sourceforge.net/gitroot/sigrok/sigrok-firmwares

Finally, for all Cypress FX2 based logic analyzers we have an open-source (GNU GPL) firmware named fx2lafw, started by myself, but most work (and finishing the firmware) was then done by Joel Holdsworth, thanks! The support list includes Saleae Logic, CWAV USBee SX, CWAV USBee AX, Robomotic Minilogic/BugLogic3, Braintechnology USB-LPS, and many others. Get the code from the fw2lafw git repository:

  $ git clone git://sigrok.git.sourceforge.net/gitroot/sigrok/fx2lafw

Example dumps

We collect various captured logic analyzer signals / protocol dumps in the sigrok-dumps git repository:

  $ git clone git://sigrok.git.sourceforge.net/gitroot/sigrok/sigrok-dumps

They can be useful for testing the sigrok command-line application, the sigrok GUIs, or the protocol decoders.

We're happy to include further contributed example data in our repository, please send us .sr files of any interesting data/protocol you may come across (even if sigrok doesn't yet have a protocol decoder for that protocol). See the Example dumps wiki page for details.

Packages, distros, installers

sigrok Windows installer

I'm currently working on updated Debian packages for sigrok (will be apt-get install sigrok to get everything), and we're happy about further packaging efforts for other distros. We have preliminary Windows installer files (using NSIS), but the Windows code needs some more fixes and portability improvements before it's really usable. On Mac OS X you can use fink/Macports to install as usual, fancier .app installer files are being worked on.

Future

Apart from support for more logic analyzers, input/output formats, and protocol decoders, we have a number of other plans for the next few releases. This includes support for analog data, i.e. support for (USB) oscilloscopes, multimeters, spectrum analyzers, and such stuff. This will also require additional GUI support (which could take a while). Also, we want to improve/fix the Windows support, and test/port sigrok to other architectures we come across. Performance improvements for the protocol decoding as well as more features there are also planned.

Contact

Feel free to contact us on the sigrok-devel mailing list, or in the IRC channel #sigrok on Freenode. There's also an identi.ca group for sigrok. We're always happy about feedback, bug reports, suggestions for improving sigrok, and patches of course!

Google releases Intel Sandybridge support for coreboot

Exciting times! In the last couple of days, Google has released a major piece of coreboot support for the Intel Sandybridge processor and Cougar Point southbridge. This is the first time that coreboot supports the latest generation of Intel chipsets. In the next weeks more code will be released to support a number of mainboards with this processor/chipset combination. Stay tuned!

Check out the article on Phoronix.

 

Flip Bits, Not Burgers – coreboot GSoC 2012 – Update

Update –

coreboot was not selected to participate in GSoC 2012. This is
disappointing new for the project. I do not know why we were not
selected this year. I will attend the post selection meeting to see
what we can do to improve our chances of selection next year.

Students, thank you for your interest in coreboot. We are happy that
you are engaging with our community. I hope that you continue
exploring your interest in coreboot. Please let us know what we can do
to assist you in your learning.

Feel free to send me questions, comments, or concerns.

Regards,
Marc

http://google-opensource.blogspot.com/

Continue reading Flip Bits, Not Burgers – coreboot GSoC 2012 – Update

Intel i5000 northbridge code commited

I’ve started that port in November 2011, and made it finally working in January. Well, at least working on my Supermicro X7DB8 Board. Compared to the vendor BIOS which takes about 30 seconds from power-on to grub, coreboot finishes the same task in 3s. Unfortunately the VGA BIOS takes about 2 seconds to program the register to do 80×25 resolution, so eventually we end up with 5s. If you don’t need a VGA console, and prefer a serial console, you can save even these two seconds.

Actually i didn’t expect the port progressing so fast. One tool that was a great help was serialice. I used it to watch the original BIOS initializing memory. To get serialice running, all you have to do is writing a few lines of board specific C code, which initializes the serial port and some basic chipset parts required for accessing the serial port registers. On the host side, a patched QEMU is running, executing the vendor BIOS while redirecting HW accesses to the target computer. Which HW accesses are redirected can be configured by a small lua script. LUA can also be used to pretty print the output from serialice.

Continue reading Intel i5000 northbridge code commited

Coreboot in shipping products

We are starting to see coreboot in more shipping products this summer and I expect even more in the fall. The exciting thing is that coreboot is becoming a piece of technology that vendors are starting to advertise. A recent example is the Portwell PCS-8277:

PORTWELL ANNOUNCES REVOLUTIONARY IN-VEHICLE PC
WITH THE BOOT SPEED OF AN APPLIANCE New PCS-8277 telematics system based on Coreboot® technology with HD graphics processing engine 

I think that we are starting to see vendors and customers becoming more knowledgeable about what is going into their products and how coreboot is an advantage in many situations. I hope to see more announcements in the coming months.