As you may know there's a Google Summer of Code program again this year.
The deadline for student applications is April 9th at 19:00 UTC, so if you're a student and you want to work on a coreboot (open-source BIOS / PC firmware) or flashrom (open-source BIOS chip flasher) project, please apply in time.
The following coreboot/flashrom GSOC project ideas have been proposed so far (but you can also suggest your own ideas, of course):
- Infrastructure for automatic code checking
- TianoCore on coreboot
- coreboot port to Marvell ARM SOCs with PCIe
- coreboot port to AMD 800 series chipsets
- coreboot mass-porting to AMD 780 series mainboards
- coreboot panic room
- coreboot cheap testing rig
- coreboot GeodeLX port from v3 to v4
- Drivers for libpayload
- Board config infrastructure
- Refactor AMD code
- Payload infrastructure
- flashrom: Multiple GUIs for flashrom
- flashrom: Recovery of dead boards and onboard flash updates
- flashrom: SPI bitbanging hardware support
- flashrom: Generic flashrom infrastructure improvements
- flashrom: Laptop support
See this wiki page for why and how to apply for a coreboot/flashrom project.
I guess it's time to finally announce libopenstm32, a Free Software firmware library for STM32 ARM Cortex-M3 microcontrollers me and a few other people have been working on in recent weeks. The library is licensed under the GNU GPL, version 3 or later (yes, that's an intentional decision after some discussions we had).
The code is available via git:
$ git clone git://libopenstm32.git.sourceforge.net/gitroot/libopenstm32/libopenstm32 $ cd libopenstm32 $ make
Building is done using a standard ARM gcc cross-compiler (arm-elf or arm-none-eabi for instance), see the summon-arm-toolchain script for the basic idea about how to build one.
The current status of the library is listed in the wiki. In short: some parts of GPIOs, UART, I2C, SPI, RCC, Timers and some other basic stuff works and has register definitions (and some convenience functions, but not too many, yet). We're working on adding support for more subsystems, any help with this is highly welcome of course! Luckily ARM stuff (and especially the STM32) has pretty good (and freely available) datasheets.
The current list of projects where we plan to use this library is Open-BLDC (an Open Hardware / Free Software brushless motor controller project by Piotr Esden-Tempski), openmulticopter (an Open Hardware / Free Software quadrocopter/UAV project), openbiosprog (an Open Hardware / Free Software BIOS chip flash programmer I'm in the process of designing using gEDA/PCB), and probably a few more.
If you plan to work on any new (or existing) microcontroller hardware- or software-projects involving an STM32 microcontroller, please consider using libopenstm32 (it's the only Free Software library for this microcontroller family I know of) and help us make it better and more complete. Thanks!
Quick public service announcement (which probably comes a bit too late, sorry):
There's a coreboot developer room at this year's FOSDEM (Free and Open-Source Software Developer's European Meeting), which starts roughly... um... today. In 20 minutes, actually. Unfortunately I cannot be there, hopefully there will be video archives of the talks. If you're at FOSDEM already, here's the list of talks:
Sat 13:00-14:00 coreboot introduction (Peter Stuge)
Sat 14:00-15:00 coreboot and PC technical details (Peter Stuge)
Sat 15:00-16:00 ACPI and Suspend/Resume under coreboot (Rudolf Marek)
Sat 16:00-17:00 coreboot board porting (Rudolf Marek)
Sat 17:00-18:00 Flashrom, the universal flash tool (Carl-Daniel Hailfinger)
Sat 18:00-19:00 Flash enable BIOS reverse engineering (Luc Verhaegen)
Highly recommended stuff if you're interested in an open-source BIOS and/or open-source, cross-platform flash EEPROM programmer software.
coreboot® is running on a multitude of different computers, ranging from tiny embedded systems as small as the palm of your hand over desktop and server systems to super computers with thousands of nodes. However, one might say that in the area of mobile computers coreboot has to catch up, compared to its support of other devices.
Thus, I am especially glad to announce that ">coresystems GmbH is releasing coreboot® for the Roda RK886EX a.k.a Rocky III+ notebook today. It's a rugged notebook, protected against shock, vibration, dust and humidity:
We have been testing various Linux distributions as well as Windows XP and Windows 7 booting on this nice notebook.
I want to sincerely thank those who made this project possible with their funding:
- secunet Security Networks AG
- Bundesamt für Sicherheit in der Informationstechnologie (Federal Office for Information Security, BSI)
A big thank you also goes to everyone who worked with coresystems on this project.
The committed patch series includes improved support for the Intel i945 / ICH7 chipset (which was also written by coresystems), the SMSC LPC47N227 Super I/O, the Texas Instruments Cardbus+Firewire bridge TI PCI7420, and finally the Renesas M3885x Embedded Controller (EC).
Btw, the latter, the so-called embedded controller (sometimes integrated in the Super I/O, sometimes it's an extra chip) is one of the major problems for coreboot support on laptops. They are almost always undocumented (i.e., no public datasheets are available), but they have low-level control over power/battery management, early power-up sequence, and often include keyboard controller functionality and other important stuff. Luckily, for this notebook an EC datasheet is available. Checkout the coreboot EC support code for the Renesas M3885x for an impression of what this stuff is all about.
Anyway, there is hope that this laptop will only be the first in a row of multiple supported ones in the future. Interested developers and contributors are of course always welcome on the coreboot mailing list :-)
In order to install Rockbox on an iPod, it needs to be formatted in FAT32, not HFS+. The relevant wiki page over at the Rockbox site suggest either connecting the iPod to an iTunes install on Windows, or using one of the bootsectors they have available for download from that page.
Those boot sectors assume your iPod has one of the factory disks installed. I’ve got an old 4th gen iPod that I converted to compact flash after its disk died. It happens to have an 8G CF card in there.
Since I don’t do Windows, I downloaded the 20G 4th gen bootsector, put that on the iPod, and used fdisk to change the size of the FAT32 partition. And that worked fine.
Anton Borisov's article Coreboot at Your Service! explains the basic ideas behind coreboot, how to build an image for your board, which payloads are available and how they are used, e.g. GRUB2, SeaBIOS if you need legacy BIOS callbacks (e.g. for booting Windows), Etherboot/GPXE, or more fun stuff such as space invaders or tint (a tetris clone) in your flash ROM chip...
If you read the article and think the build process is a bit complicated and ugly, do not despair! We're currently in the process of converting the whole coreboot code base to use kconfig (the widely-known configuration tool used by the Linux kernel, busybox, and other projects), so in the very near future the whole process for building a coreboot image will work like this:
$ make menuconfig $ make
Flashing the image can then be done using an EEPROM programmer and/or via the user-space utility flashrom (available for Linux, Mac OS X, FreeBSD, etc.)...
It's nice to see that coreboot is getting more and more coverage in "mainstream" media and is growing both in number of deployments and in number of supported chipsets and boards.
We are desperately in need of more developers though, there are just way too many chipsets, boards, and datasheets out there; we're happy about every patch and every new tester or developer who likes to mess with code that runs in the very first few (micro)seconds after power-on.
If you think kernel hacking and related low-level development is nice, you might also be interested in writing code where there's no RAM yet (as coreboot has to initialize it), there's no serial port for debugging (coreboot has to initialize it), no PCI devices have been set up, most of your auxiliary hardware is not yet up (ethernet NIC, parallel port, audio, IDE, SATA, USB, you name it). It's a fun environment to work in and you'll learn a lot about PC hardware, even if you (so far) thought you knew everything there is to know.
Here's a quick introduction to using a cheap FTDI FT2232H based module (left-hand side on the photo) as a JTAG programmer together with the OpenOCD JTAG software for ARM and MIPS devices. The module I am using for thіs purpose is a DLP Design DLP-USB1232H, which is available from various sources (Digikey, Mouser, Saelig, and probably others) for 20-30 bucks plus shipping, depending on where you live.
By properly connecting the correct pins of the DLP-USB1232H to the target JTAG
device (I used an Olimex STM32-H103 eval board for testing) you can easily abuse the DLP-USB1232H as JTAG programmer. As I chose the proper DLP-USB1232H GPIOs for the TRST and (S)RST pins, OpenOCD even worked out of the box, without having to change a single line of code.
The only thing that's required is to provide OpenOCD with an interface config file that uses the usbjtag "layout". I have already submitted that config file upstream, I guess it should be merged soonish.
The usage is then pretty simple:
$ openocd -f interface/dlp-usb1232h.cfg -f board/olimex_stm32_h103.cfg
And in another xterm:
$ telnet localhost 4444 > init > reset halt > flash write_image erase fancyblink.bin 0x08000000 > reset
This flashes the given fancyblink.bin image onto the STM32-H103 eval board via the DLP-USB1232H JTAG programmer, where fancyblink.bin is an example program from my libopenstm32 project (that aims to create a full-blown firmware library for ST STM32 microcontrollers, similar to what avr-libc does for AVRs). Contributions for libopenstm32 (license is GPLv3 or later) are highly welcome btw., hint hint...
$ git clone git://libopenstm32.git.sourceforge.net/gitroot/libopenstm32/libopenstm32
Full schematics, datasheets, and detailed instructions for the JTAG programmer are available from a small page I created in my Random Projects wiki, which is intended for the various smaller projects I'm working on that don't warrant getting their own domain, wiki, etc:
The Random Projects wiki is open-for-all btw, feel free to use it for any freeish, software or hardware projects of your own if you want.
Anyway, the DLP-USB1232H is a really nice device as it can also be used for many other purposes, such as USB-to-Serial or SPI BIOS chip programming, but more on that in another blog post...
To quote from the website:
Qi Hardware, founded on the belief in open hardware, produces mass market quality hardware applying free software principles to consumer electronics. The three fundamental elements in our development are copyleft hardware, upstream kernels and community driven software.
They have put up a timeline for upcoming products, where the 本 NanoNote™ (Ben NanoNote™) — a fully open multifunction ultra small form factor computing device — is the first entry product that is supposed to ship in fall 2009.
The Ben NanoNote is based on an Ingenic SoC (336 MHz XBurst Jz4720 MIPS-compatible CPU) with 3.0” color TFT (320x240), 2GB NAND flash, 32 MB SDRAM, SDHC microSD, micro-USB 2.0. The whole device, including the 850mAh Li-ion battery, weighs only 126g. Detailed specs are available.
Their currently planned setup includes a Linux kernel, u-boot, and OpenWRT as software basis. Personally, I'd like to see a stock Debian running on the hardware sooner or later, of course. The 2GB of flash and 32MB of RAM should be fine for a small Debian system (for instance, my NSLU2 runs off a 1GB thumb drive and has 32MB RAM, and is still very useful).
The code is all GPL'd and available from various git repos, hardware will be CC-BY-SA 3.0 licensed, and they try to use Free Software design and development tools also, including KiCAD for schematics and PCB layout, and probably HeeksCAD as CAD tool for mechanical stuff.
I'm really tired of seeing more and more self-proclaimed "Open Hardware" projects that often don't even mention any license for their schematics and PCBs, or use crappy, self-invented "open" licenses that are not even remotely open in any way. Probably even worse, many hardware related projects use closed-source, proprietary electronic design tools such as EAGLE or OrCAD, thereby ruining the whole project from the beginning by forcing everyone who likes to contribute or adapt the hardware to use non-free software. That's why I was really happy to see the Qi people thrive to use open tools from the beginning! I hope to see more hardware projects use KiCAD or gEDA/PCB for their designs in future...
Good news for kernel hackers, and especially coreboot developers like me: AMD has released the chipset documentation for the RS780 chipset, including the BIOS Developer's Guide. And these documents are being released freely and openly to the public, no NDAs required, which is great!
The coreboot community, which includes government organizations, corporations, research labs and individuals from around the world, is very excited to expand on our existing and decade-long collaboration with AMD. This collaboration has, over the years, resulted in the inclusion of coreboot into everything from some of the largest AMD-based supercomputers in the world to some of the smallest embedded systems.
Together with the recent SB700/SB710/SB750 documentation release, the Developer Guide release for the RS780 family of Integrated Chipset/Graphics Processors enables the coreboot community to support any board with AMD chipsets out there, from embedded to enthusiast desktop and high-end server boards.
This new release once again demonstrates AMD's commitment to open standards and software that provides an improved user experience and Total Cost of Ownership for users in every walk of life. One cornerstone of this openness is the availability of documentation without NDA, enabling everyone to contribute.
Coreboot is open source, so every interested developer or user can modify, tweak and extend it to their heart's content.
An additional benefit of this documentation release is flashrom support for all AMD chipsets which enables users to reflash their BIOS/firmware/coreboot from within Linux and *BSD without rebooting.
Coreboot code for the SB700 and 780 chipset family is already being worked on by Zheng Bao at AMD in his spare time and the coreboot community is happy to work with him on finishing and integrating the code into the official coreboot codebase.
We'd like to thank Sharon Troia at AMD for making these documentation releases possible.
The exact download URLs are listed at http://www.coreboot.org/Datasheets.