CF iPod conversion to FAT32

In order to install Rockbox on an iPod, it needs to be formatted in FAT32, not HFS+. The relevant wiki page over at the Rockbox site suggest either connecting the iPod to an iTunes install on Windows, or using one of the bootsectors they have available for download from that page.

Those boot sectors assume your iPod has one of the factory disks installed. I’ve got an old 4th gen iPod that I converted to compact flash after its disk died. It happens to have an 8G CF card in there.

Since I don’t do Windows, I downloaded the 20G 4th gen bootsector, put that on the iPod, and used fdisk to change the size of the FAT32 partition. And that worked fine.

coreboot on the cover of the Linux Journal

coreboot on Linux Journal

Nice coreboot news — the Free Software x86 firmware ("BIOS") is featured on the cover of issue 186 of the Linux Journal.

Anton Borisov's article Coreboot at Your Service! explains the basic ideas behind coreboot, how to build an image for your board, which payloads are available and how they are used, e.g. GRUB2, SeaBIOS if you need legacy BIOS callbacks (e.g. for booting Windows), Etherboot/GPXE, or more fun stuff such as space invaders or tint (a tetris clone) in your flash ROM chip...

If you read the article and think the build process is a bit complicated and ugly, do not despair! We're currently in the process of converting the whole coreboot code base to use kconfig (the widely-known configuration tool used by the Linux kernel, busybox, and other projects), so in the very near future the whole process for building a coreboot image will work like this:

  $ make menuconfig
  $ make

coreboot menuconfig

Flashing the image can then be done using an EEPROM programmer and/or via the user-space utility flashrom (available for Linux, Mac OS X, FreeBSD, etc.)...

It's nice to see that coreboot is getting more and more coverage in "mainstream" media and is growing both in number of deployments and in number of supported chipsets and boards.

We are desperately in need of more developers though, there are just way too many chipsets, boards, and datasheets out there; we're happy about every patch and every new tester or developer who likes to mess with code that runs in the very first few (micro)seconds after power-on.

If you think kernel hacking and related low-level development is nice, you might also be interested in writing code where there's no RAM yet (as coreboot has to initialize it), there's no serial port for debugging (coreboot has to initialize it), no PCI devices have been set up, most of your auxiliary hardware is not yet up (ethernet NIC, parallel port, audio, IDE, SATA, USB, you name it). It's a fun environment to work in and you'll learn a lot about PC hardware, even if you (so far) thought you knew everything there is to know.

Feel free to join us on the mailing list or on IRC in #coreboot on Freenode.

A simple DLP-USB1232H based JTAG programmer with OpenOCD support

DLP-USB1232H and OpenOCD based JTAG adapter

Here's a quick introduction to using a cheap FTDI FT2232H based module (left-hand side on the photo) as a JTAG programmer together with the OpenOCD JTAG software for ARM and MIPS devices. The module I am using for thіs purpose is a DLP Design DLP-USB1232H, which is available from various sources (Digikey, Mouser, Saelig, and probably others) for 20-30 bucks plus shipping, depending on where you live.

By properly connecting the correct pins of the DLP-USB1232H to the target JTAG
device (I used an Olimex STM32-H103 eval board for testing) you can easily abuse the DLP-USB1232H as JTAG programmer. As I chose the proper DLP-USB1232H GPIOs for the TRST and (S)RST pins, OpenOCD even worked out of the box, without having to change a single line of code.

The only thing that's required is to provide OpenOCD with an interface config file that uses the usbjtag "layout". I have already submitted that config file upstream, I guess it should be merged soonish.

The usage is then pretty simple:

  $ openocd -f interface/dlp-usb1232h.cfg -f board/olimex_stm32_h103.cfg

And in another xterm:

  $ telnet localhost 4444
  > init
  > reset halt
  > flash write_image erase fancyblink.bin 0x08000000
  > reset

This flashes the given fancyblink.bin image onto the STM32-H103 eval board via the DLP-USB1232H JTAG programmer, where fancyblink.bin is an example program from my libopenstm32 project (that aims to create a full-blown firmware library for ST STM32 microcontrollers, similar to what avr-libc does for AVRs). Contributions for libopenstm32 (license is GPLv3 or later) are highly welcome btw., hint hint...

  $ git clone git://libopenstm32.git.sourceforge.net/gitroot/libopenstm32/libopenstm32

Full schematics, datasheets, and detailed instructions for the JTAG programmer are available from a small page I created in my Random Projects wiki, which is intended for the various smaller projects I'm working on that don't warrant getting their own domain, wiki, etc:

The Random Projects wiki is open-for-all btw, feel free to use it for any freeish, software or hardware projects of your own if you want.

Anyway, the DLP-USB1232H is a really nice device as it can also be used for many other purposes, such as USB-to-Serial or SPI BIOS chip programming, but more on that in another blog post...

Qi Hardware: Freedom Redefined – New Open Hardware company to ship Ben NanoNote device in fall 2009

Qi Hardware Ben NanoNote

I recently stumbled over a neat new Open Hardware and Free Software friendly company — Qi Hardware — founded by former OpenMoko developers.

To quote from the website:

Qi Hardware, founded on the belief in open hardware, produces mass market quality hardware applying free software principles to consumer electronics. The three fundamental elements in our development are copyleft hardware, upstream kernels and community driven software.

They have put up a timeline for upcoming products, where the 本 NanoNote™ (Ben NanoNote™) — a fully open multifunction ultra small form factor computing device — is the first entry product that is supposed to ship in fall 2009.

The Ben NanoNote is based on an Ingenic SoC (336 MHz XBurst Jz4720 MIPS-compatible CPU) with 3.0” color TFT (320x240), 2GB NAND flash, 32 MB SDRAM, SDHC microSD, micro-USB 2.0. The whole device, including the 850mAh Li-ion battery, weighs only 126g. Detailed specs are available.

Their currently planned setup includes a Linux kernel, u-boot, and OpenWRT as software basis. Personally, I'd like to see a stock Debian running on the hardware sooner or later, of course. The 2GB of flash and 32MB of RAM should be fine for a small Debian system (for instance, my NSLU2 runs off a 1GB thumb drive and has 32MB RAM, and is still very useful).

The code is all GPL'd and available from various git repos, hardware will be CC-BY-SA 3.0 licensed, and they try to use Free Software design and development tools also, including KiCAD for schematics and PCB layout, and probably HeeksCAD as CAD tool for mechanical stuff.

gEDA/PCB logo
I'm really tired of seeing more and more self-proclaimed "Open Hardware" projects that often don't even mention any license for their schematics and PCBs, or use crappy, self-invented "open" licenses that are not even remotely open in any way. Probably even worse, many hardware related projects use closed-source, proprietary electronic design tools such as EAGLE or OrCAD, thereby ruining the whole project from the beginning by forcing everyone who likes to contribute or adapt the hardware to use non-free software. That's why I was really happy to see the Qi people thrive to use open tools from the beginning! I hope to see more hardware projects use KiCAD or gEDA/PCB for their designs in future...

AMD RS780 chipset documentation released, coreboot support upcoming

coreboot logo

Good news for kernel hackers, and especially coreboot developers like me: AMD has released the chipset documentation for the RS780 chipset, including the BIOS Developer's Guide. And these documents are being released freely and openly to the public, no NDAs required, which is great!

Quoting from the original announcement on the coreboot-announce mailing list:

The coreboot community, which includes government organizations, corporations, research labs and individuals from around the world, is very excited to expand on our existing and decade-long collaboration with AMD. This collaboration has, over the years, resulted in the inclusion of coreboot into everything from some of the largest AMD-based supercomputers in the world to some of the smallest embedded systems.

Together with the recent SB700/SB710/SB750 documentation release, the Developer Guide release for the RS780 family of Integrated Chipset/Graphics Processors enables the coreboot community to support any board with AMD chipsets out there, from embedded to enthusiast desktop and high-end server boards.

This new release once again demonstrates AMD's commitment to open standards and software that provides an improved user experience and Total Cost of Ownership for users in every walk of life. One cornerstone of this openness is the availability of documentation without NDA, enabling everyone to contribute.

[...]

Coreboot is open source, so every interested developer or user can modify, tweak and extend it to their heart's content.

An additional benefit of this documentation release is flashrom support for all AMD chipsets which enables users to reflash their BIOS/firmware/coreboot from within Linux and *BSD without rebooting.

Coreboot code for the SB700 and 780 chipset family is already being worked on by Zheng Bao at AMD in his spare time and the coreboot community is happy to work with him on finishing and integrating the code into the official coreboot codebase.

We'd like to thank Sharon Troia at AMD for making these documentation releases possible.

The exact download URLs are listed at http://www.coreboot.org/Datasheets.

Flashrom 0.9 release – Flashing your BIOS from the Unix/Linux command line

I have mentioned the flashrom utility in my blog in the past. This is a small command line tool which allows you to update your BIOS/coreboot/firmware chips without opening the computer and without any special boot procedures.

Yesterday, flashrom 0.9 was finally released. Here's a short passage from the release announcement:

After nine years of development and constant improvement, we have added support for every BIOS flash ROM technology present on x86 mainboards and every flash ROM chip we ever saw in the wild.

Highlights of flashrom include:

  • Parallel, LPC, FWH and SPI flash interfaces.
  • 157 flash chip families and half a dozen variants of each family.
  • Flash chip package agnostic. DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, TSOP40 and more have all been verified to work.
  • 75 different chipsets, some with multiple flash controllers.
  • Special mainboard enabling code for dozens of nonstandard mainboards.
  • No physical access needed. root access is sufficient.
  • No bootable floppy disk, bootable CD-ROM or other media needed.
  • No keyboard or monitor needed. Simply reflash remotely via SSH.
  • No instant reboot needed. Reflash your ROM in a running system, verify it, be happy. The new firmware will be present next time you boot.
  • Crossflashing and hotflashing is possible as long as the flash chips are electrically and logically compatible (same protocol). Great for recovery.
  • Scriptability. Reflash a whole pool of identical machines at the same time from the command line. It is recommended to check flashrom output and error codes.
  • Speed. flashrom is much faster than vendor flash tools.
  • Supports Linux, FreeBSD, DragonFly BSD, Solaris, Mac OS X. Please refer to the README for build instructions.

Please note that rewriting your flash chip can be dangerous and flashrom developers make no guarantees whatsoever. That said, many users have successfully replaced proprietary tools such as awdflash, amiflash and afudos with flashrom.

Download: flashrom-0.9.0.tar.gz
SVN: svn co svn://coreboot.org/flashrom/trunk flashrom
Debian: apt-get install flashrom

Do yourself a favor and try flashrom next time you want to upgrade your BIOS. No more floppies or bootable CD-ROMs with DOS/Windows binaries or similar crap. Run flashrom conveniently from the Linux command line, or even via SSH or serial console if you want...

Resolving mysterious kernel/firmware problems via apt-get install firmware-linux

If you recently upgraded your kernel to the 2.6.29 Debian package, you might have noticed some (e.g. graphics) drivers stopped working or are working slower. In my case, this was the radeon driver, which inexplicably seemed to cause lots of slowdowns in some applications and games. A quick look into dmesg revealed the reason:

  [drm] Initialized radeon 1.29.0 20080528 on minor 0
  agpgart-intel 0000:00:00.0: AGP 2.0 bridge
  agpgart-intel 0000:00:00.0: putting AGP V2 device into 4x mode
  pci 0000:01:00.0: putting AGP V2 device into 4x mode
  [drm] Setting GART location based on new memory map
  [drm] Loading R200 Microcode
  platform radeon_cp.0: firmware: requesting radeon/R200_cp.bin
  radeon_cp: Failed to load firmware "radeon/R200_cp.bin"
  [drm:radeon_do_init_cp] *ERROR* Failed to load firmware!

As noted in the changelog file, the radeon firmware R200_cp.bin has been removed from the kernel, and is now available in the separate firmware-linux Debian package. So the simple fix for this issues is:

  $ apt-get install firmware-linux
  $ dpkg -L firmware-linux | grep R200_cp.bin
  /lib/firmware/radeon/R200_cp.bin

After restarting X, the dmesg output looks more sane again:

  agpgart-intel 0000:00:00.0: AGP 2.0 bridge
  agpgart-intel 0000:00:00.0: putting AGP V2 device into 4x mode
  pci 0000:01:00.0: putting AGP V2 device into 4x mode
  [drm] Setting GART location based on new memory map
  [drm] Loading R200 Microcode
  platform radeon_cp.0: firmware: requesting radeon/R200_cp.bin
  [drm] writeback test succeeded in 2 usecs

Coreboot hacking: How to solder a PLCC socket on your board

Desoldering station.

When trying to port coreboot (previously LinuxBIOS) to a new mainboard you're often confronted with a big problem: the BIOS/ROM chip on the respective motherboard is soldered onto the board (i.e., not in a socket).

This means that you cannot easily (hot-)swap the chip during development or for recovery purposes. So you basically have exactly one try to flash the ROM chip with a fully working/booting coreboot image. If that goes wrong your board is bricked.

Desoldering the chip

This makes it pretty much impossible to develop a coreboot port for such boards (and soldered-on ROM chips are becoming more and more common, unfortunately).

However, I've recently tried to replace the soldered-on (PLCC) ROM chip on one of my boards with a socket. What sounds pretty scary at first, especially given that I have almost non-existant soldering skills, turned out to be really not that hard. Also, it can be done with relatively cheap and readily available equipment.

I have written a short HOWTO for desoldering chips and soldering on sockets in the coreboot wiki, and also finished a video showing most of the process, which I hope will be helpful for others:

Place the PLCC chip


The video is CC-BY-SA 3.0, music is taken from ccmixter.org and is CC-NC 3.0 licensed. Video editing was done using Kino (which uses ffmpeg2theora for Ogg Theora export).

I also tried to upload the video to Vimeo, but first they told me to install the Flash 10 abomination (and there's no way I will do that). After browsing the help/forum pages a bit I found a traditional, non-flash upload form, but that then tells me that I cannot upload Ogg Theora videos. WTF?

Soldering the socket

The Ogg Theora video support feature request has been open for more that a year. Until that issue is fixed I'll just use other video services, thanks...

Building an ARM cross-toolchain with binutils, gcc, newlib, and gdb from source

I've been planning to write about building custom ARM toolchains for a while (I used stuff from gnuarm.com in the past, but I switched to the lastest and greatest upstream versions at some point). Among other things, recent upstream versions now have ARM Cortex support.

First you will need a few base utilities and libs:

  $ apt-get install flex bison libgmp3-dev libmpfr-dev autoconf texinfo build-essential

Then you can use my tiny build-arm-toolchain script, which will download, build, and install the whole toolchain:

  $ cat build-arm-toolchain
  #!/bin/sh
  # Written by Uwe Hermann <uwe@hermann-uwe.de>, released as public domain.

  TARGET=arm-elf                         # Or: TARGET=arm-none-eabi
  PREFIX=/tmp/arm-cortex-toolchain       # Install location of your final toolchain
  PARALLEL="-j 2"                        # Or: PARALLEL=""

  BINUTILS=binutils-2.19.1
  GCC=gcc-4.3.3
  NEWLIB=newlib-1.17.0
  GDB=gdb-6.8

  export PATH="$PATH:$PREFIX/bin"

  mkdir build

  wget -c http://ftp.gnu.org/gnu/binutils/$BINUTILS.tar.bz2
  tar xfvj $BINUTILS.tar.bz2
  cd build
  ../$BINUTILS/configure --target=$TARGET --prefix=$PREFIX --enable-interwork --enable-multilib \
    --with-gnu-as --with-gnu-ld --disable-nls
  make $PARALLEL
  make install
  cd ..
  rm -rf build/* $BINUTILS $BINUTILS.tar.bz2

  wget -c ftp://ftp.gnu.org/gnu/gcc/$GCC/$GCC.tar.bz2
  tar xfvj $GCC.tar.bz2
  cd build
  ../$GCC/configure --target=$TARGET --prefix=$PREFIX --enable-interwork --enable-multilib \
    --enable-languages="c" --with-newlib --without-headers --disable-shared --with-gnu-as --with-gnu-ld
  make $PARALLEL all-gcc
  make install-gcc
  cd ..
  rm -rf build/* $GCC.tar.bz2

  wget -c ftp://sources.redhat.com/pub/newlib/$NEWLIB.tar.gz
  tar xfvz $NEWLIB.tar.gz
  cd build
  ../$NEWLIB/configure --target=$TARGET --prefix=$PREFIX --enable-interwork --enable-multilib \
    --with-gnu-as --with-gnu-ld --disable-nls
  make $PARALLEL
  make install
  cd ..
  rm -rf build/* $NEWLIB $NEWLIB.tar.gz

  # Yes, you need to build gcc again!
  cd build
  ../$GCC/configure --target=$TARGET --prefix=$PREFIX --enable-interwork --enable-multilib \
    --enable-languages="c,c++" --with-newlib --disable-shared --with-gnu-as --with-gnu-ld
  make $PARALLEL
  make install
  cd ..
  rm -rf build/* $GCC

  wget -c ftp://ftp.gnu.org/gnu/gdb/$GDB.tar.bz2
  tar xfvj $GDB.tar.bz2
  cd build
  ../$GDB/configure --target=$TARGET --prefix=$PREFIX --enable-interwork --enable-multilib
  make $PARALLEL
  make install
  cd ..
  rm -rf build $GDB $GDB.tar.bz2

The final toolchain is located in /tmp/arm-cortex-toolchain per default, and is ca. 170 MB in size. I explicitly created the build script in such a way that it minimizes the amount of disk space used during the build (ca. 1.2 GB or so, compared to more than 3 GB in the "naive" approach).

Using the "-j 2" option for make (see script) you can speed up the build quite a bit on multi-core machines (ca. 30 minutes vs. 60 minutes on an AMD X2 dual-core box). Also, you can change the script to build for other target variants if you want to (arm-elf or arm-none-eabi, for example).

Checkout the blog entry How to build arm gnu gcc toolchain for Mac OS X by Piotr Esden-Tempski for similar instructions for Mac OS X users.

Oh, and while I'm at it — does anybody have any idea why there are no pre-built toolchains for embedded (microcontroller) ARM targets in Debian? There are some toolchains for other microcontroller architectures (avr, m68hc1x, h8300, z80) but not too much other stuff. Is there some specific reason for the missing ARM toolchains (other than "nobody cared enough yet")?

I have heard about Emdebian, but from a quick look that seems to be more intended for toolchains with Linux/libc, not for microcontroller firmware (i.e. no MMU, no Linux, no libc etc.), but maybe I'm wrong?

How to use the full size of your (x)term when connecting to some other box serially with minicom

minicom terminal size 1

Just as a reminder for myself, as I'll probably need this more often in the future (and maybe it's helpful for others):

Per default, if you use a big xterm (232x74 in my case) where you start minicom, the $COLUMNS and $LINES environment variables will be 80x24 nevertheless, and those applications which honor them (vim, for example) will be too small and not use the full xterm size of 232x74.

  $ minicom
  $ echo $COLUMNS; echo $LINES
  80
  24

minicom terminal size 2

You can fix that like this:

  $ eval `resize`
  $ echo $COLUMNS; echo $LINES
  232
  74

After you do eval `resize` the variables are updated and vim will use the full xterm size. That's all.